Trim whitespace

This commit is contained in:
James Harris
2016-12-28 16:11:25 +00:00
parent 7c33b5996c
commit 4f3a1d4374
166 changed files with 5357 additions and 5357 deletions

View File

@ -8,8 +8,8 @@
# Website: www.ibiblio.org/apollo.
# Pages: 1107-1199
# Mod history: 2009-05-08 RSB Adapted from the Luminary131/ file of the
# same name, using Comanche055 page images.
# 2009-05-20 RSB Corrections: P00D00 -> P00DOO, fixed a
# same name, using Comanche055 page images.
# 2009-05-20 RSB Corrections: P00D00 -> P00DOO, fixed a
# "Page N" reference.
# 2009-05-21 RSB Corrected definition of 5B10, which overflowed
# integer arithmetic.
@ -20,13 +20,13 @@
# thanks to both. The images (with suitable reduction in storage size and
# consequent reduction in image quality as well) are available online at
# www.ibiblio.org/apollo. If for some reason you find that the images are
# illegible, contact me at info@sandroid.org about getting access to the
# illegible, contact me at info@sandroid.org about getting access to the
# (much) higher-quality images which Paul actually created.
#
# Notations on the hardcopy document read, in part:
#
# Assemble revision 055 of AGC program Comanche by NASA
# 2021113-051. 10:28 APR. 1, 1969
# 2021113-051. 10:28 APR. 1, 1969
#
# This AGC program shall also be referred to as
# Colossus 2A
@ -41,7 +41,7 @@
# E-BANK SWITCHING OCCURS WHENEVER GENERAL ERASABLE (100-3777) IS ADDRESSED.
BLOCK 03
COUNT* $$/INTER
INTPRET RELINT
EXTEND # SET LOC TO THE WORD FOLLOWING THE TC.
@ -128,15 +128,15 @@ NEG4 DEC -4
CCS A
AD -ENDERAS # IF NOT, SEE IF IN GENERAL ERASABLE.
TCF IERASTST
NETZERO CA FIXLOC # IF SO, LEAVE THE MODIFIED ADDRESS IN
ADS ADDRWD # ADDRWD AND DISPATCH.
ITR15 INDEX CYR # THIS INDEX MAKES THE NEXT INSTRUCTION
7 INDJUMP -1 # TCF INDJUMP + OP, EDITING CYR.
IERASTST EXTEND
BZMF GEADDR # GO PROCESS GENERAL-ERASABLE ADDRESS.
MASK LOW10 # FIXED BANK ADDRESS. RESTORE AND ADD B15.
AD LOW10 # SWITCH BANKS AND LEAVE SUBADDRESS IN
XCH ADDRWD # ADDRWD FOR OPERAND RETRIEVAL. (THIS
@ -144,7 +144,7 @@ IERASTST EXTEND
TS FBANK # LOCATION IN EACH FBANK.)
ITR12 INDEX CYR
7 INDJUMP -1
GEADDR MASK LOW8
AD OCT1400
XCH ADDRWD
@ -159,7 +159,7 @@ ITR10 INDEX CYR
DODLOAD* CAF DLOAD* # STODL* COMES HERE TO PROCESS LOAD ADR.
TS CYR # (STOVL* ENTERS HERE).
INDEX CA FIXLOC # SET UP INDEX LOCATION.
TS INDEXLOC
INCR LOC # (ADDRESS ALWAYS GIVEN).
@ -168,7 +168,7 @@ INDEX CA FIXLOC # SET UP INDEX LOCATION.
CCS A # INDEX 2 IF ADDRESS STORED COMPLEMENTED.
INCR INDEXLOC
NOOP
TS ADDRWD # 14 BIT ADDRESS TO ADDRWD.
MASK HIGH4 # IF ADDRESS GREATER THAN 2K, ADD INTBIT15
EXTEND
@ -179,7 +179,7 @@ INDEX CA FIXLOC # SET UP INDEX LOCATION.
INDEX2 INDEX INDEXLOC
CS X1
ADS ADDRWD # DO AUGMENT, IGNORING AND CORRECTING OVF.
MASK HIGH9 # SEE IF ADDRESS IS IN WORK AREA.
EXTEND
BZF INDWORK
@ -194,7 +194,7 @@ INDEX2 INDEX INDEXLOC
TS ADDRWD
ITR11 INDEX CYR
3 INDJUMP -1
INDWORK CA FIXLOC # MAKE ADDRWD RELATIVE TO WORK AREA.
TCF ITR13 -1
@ -206,7 +206,7 @@ INDERASE CA OCT1400
# Page 1112
ITR13 INDEX CYR
3 INDJUMP -1
# Page 1113
# PUSH-UP ROUTINES. WHEN NO OPERAND ADDRESS IS GIVEN, THE APPROPRIATE OPERAND IS TAKEN FROM THE PUSH-DOWN
# LIST. IN MOST CASES THE MODE OF THE RESULT (VECTOR OR SCALAR) OF THE LAST ARITHMETIC OPERATION PERFORMED
@ -227,7 +227,7 @@ PUSHUP CAF OCT23 # IF THE LOW 5 BITS OF CYR ARE LESS THAN
AD -OCT10 # (NO -0).
CCS A
TCF REGUP # FOR ALL CODES GREATER THAN OCT 7.
-OCT10 OCT -10
AD NEG4 # WE NOW HAVE 7 -- OP CODE (MOD4). SEE IF
@ -235,7 +235,7 @@ PUSHUP CAF OCT23 # IF THE LOW 5 BITS OF CYR ARE LESS THAN
INDEX A # NO -- THE MODE IS DEFINITE. PICK UP THE
CS NO.WDS
TCF REGUP +2
INDEX MODE # FOR VXSC AND V/SC WE WANT THE REQUIRED
CS REVCNT # PUSHLOC DECREMENT WITHOUT CHANGING THE
TCF REGUP +2 # MODE AT THE IS TIME.
@ -259,7 +259,7 @@ OCTAL3 OCT 3 # 2 IN DP, AND 3 IN TP.
OPJUMP2 CCS CYR # TEST SECOND PREFIX BIT.
TCF OPJUMP3 # TEST THIRD BIT TO SEE IF UNARY OR SHIFT
-ENDVAC DEC -45
# THE FOLLOWING ROUTINE PROCESSES ADDRESSES OF SUFFIX CLASS 10. THEY ARE BASICALLY WORK AREA ADDRESSES
@ -270,13 +270,13 @@ OPJUMP2 CCS CYR # TEST SECOND PREFIX BIT.
INDEX LOC # PICK UP ADDRESS WORD.
CA 0
TS POLISH # WE MAY NEED A SUBADDRESS LATER.
CAF LOW7+2K # THESE INSTRUCTIONS ARE IN BANK 1.
TS FBANK
MASK CYR
ITR7 INDEX A
TCF MISCJUMP
# Page 1115
# COMPLETE THE DISPATCHING OF UNARY AND SHORT SHIFT OPERATIONS.
@ -285,12 +285,12 @@ OPJUMP3 TS FBANK # CALL IN BANK 0 (BIT5S 11-15 OF A ARE 0.)
CCS CYR # TEST THIRD PREFIX BIT.
INDEX A # THE DECREMENTED UNARY CODE IS IN BITS
TCF UNAJUMP # 1-4 OF A (ZERO, EXIT, HAS BEEN DETECTED)
CCS MODE # IT'S A SHORT SHIFT CODE. SEE IF PRESENT
TCF SHORTT # SCALAR OR VECTOR.
TCF SHORTT
TCF SHORTV # CALLS THE APPROPRIATE ROUTINE.
FBANKMSK EQUALS BANKMASK
LVBUF ADRES VBUF
@ -305,7 +305,7 @@ INDJUMP TCF VLOAD # 00 -- LOAD MPAC WITH A VECTOR.
TCF TLOAD # 05 -- LOAD MPAC WITH TRIPLE PRECISION.
TCF DLOAD # 06 -- LOAD MPAC WITH A DP SCALAR.
TCF V/SC # 07 -- VECTOR DIVIDED BY A SCALAR.
TCF SLOAD # 10 -- LOAD MPAC IN SINGLE PRECISION.
TCF SSP # 11 -- SET SINGLE PRECISION INTO X.
TCF PDDL # 12 -- PUSH DOWN MPAC AND RE-LOAD IN DP.
@ -314,7 +314,7 @@ INDJUMP TCF VLOAD # 00 -- LOAD MPAC WITH A VECTOR.
TCF CCALL # 15 -- COMPUTED CALL.
TCF VXM # 16 -- MATRIX PRE-MULTIPLIED BY VECTOR.
TCF TSLC # 17 -- NORMALIZE MPAC (SCALAR ONLY).
TCF DMPR # 20 -- DP MULTIPLY AND ROUND.
TCF DDV # 21 -- DP DIVIDE BY.
TCF BDDV # 22 -- DP DIVIDE INTO.
@ -323,7 +323,7 @@ INDJUMP TCF VLOAD # 00 -- LOAD MPAC WITH A VECTOR.
TCF VSU # 25 -- VECTOR SUBTRACT.
TCF BVSU # 26 -- VECTOR SUBTRACT FROM.
TCF DOT # 27 -- VECTOR DOT PRODUCT.
TCF VXV # 30 -- VECTOR CROSS PRODUCT.
TCF VPROJ # 31 -- VECTOR PROJECTION.
TCF DSU # 32 -- DP SUBTRACT.
@ -332,7 +332,7 @@ INDJUMP TCF VLOAD # 00 -- LOAD MPAC WITH A VECTOR.
TCF +0 # 35 -- AVAILABLE
TCF DMP1 # 36 -- DP MULTIPLY.
TCF SETPD # 37 -- SET PUSH DOWN POINTER (DIRECT ONLY)
# CODES 10 AND 14 MUST NOT PUSH UP. CODE 04 MAY BE USED FOR VECTOR DECLARE BEFORE PUSHUP IF DESIRED.
# Page 1117
@ -346,7 +346,7 @@ MISCJUMP TCF AXT # 00 -- ADDRESS TO INDEX TRUE.
TCF XCHX # 05 -- EXCHANGE INDEX WITH ERASABLE.
TCF INCR # 06 -- INCREMENT INDEX REGISTER.
TCF TIX # 07 -- TRANSFER ON INDEX.
TCF XAD # 10 -- INDEX REGISTER ADD FROM ERASABLE.
TCF XSU # 11 -- INDEX SUBTRACT FROM ERASABLE.
TCF BZE/GOTO # 12 -- BRANCH ZERO AND GOTO
@ -367,7 +367,7 @@ UNAJUMP TCF SQRT # 01 -- SQUARE ROOT.
TCF ARCCOS # 05 -- ARC COS.
TCF DSQ # 06 -- DP SQUARE.
TCF ROUND # 07 -- ROUND TO DP.
TCF COMP # 10 -- COMPLEMENT VECTOR OR SCALAR
TCF VDEF # 11 -- VECTOR DEFINE.
TCF UNIT # 12 -- UNIT VECTOR.
@ -376,12 +376,12 @@ UNAJUMP TCF SQRT # 01 -- SQUARE ROOT.
TCF STADR # 15 -- PUSH UP ON STORE CODE.
TCF RVQ # 16 -- RETURN VIA QPRET.
TCF PUSH # 17 -- PUSH MPAC DOWN.
# Page 1119
# SECTION 2 LOAD AND STORE PACKAGE.
#
# A SET OF EIGHT STORE CODES IS PROVIDED AS THE PRIMARY METHOD OF STORING THE MULTI-PURPOSE
# ACCUMULATOR (MPAC). IF IN THE DANZIG SECTION LOC REFERS TO AN ALGEBRAICALLY POSITIVE WORD, IT IS TAKEN AS A
# ACCUMULATOR (MPAC). IF IN THE DANZIG SECTION LOC REFERS TO AN ALGEBRAICALLY POSITIVE WORD, IT IS TAKEN AS A
# STORE CODE WITH A CORRESPONDING ERASABLE ADDRESS. MOST OF THESE CODES ARE TWO ADDRESS, SPECIFYING THAT THE WORD
# FOLLOWING THE STORE CODE IS TO BE USED AS AN ADDRESS FROM WHICH TO RE-LOAD MPAC. FOUR OPTIONS ARE AVAILABLE:
#
@ -393,17 +393,17 @@ UNAJUMP TCF SQRT # 01 -- SQUARE ROOT.
# STODL AND STOVL WILL TAKE FROM THE PUSH-DOWN LIST IF NO LOAD ADDRESS IS GIVEN.
BLOCK 3
COUNT 03/INTER
STADR CA BANKSET # THE STADR CODE (PUSHUP UP ON STORE
TS FBANK # ADDRESS) ENTERS HERE.
INCR LOC
ITR1 INDEX LOC # THE STORECODE WAS STORED COMPLEMENTED TO
CS 0 # MAKE IT LOOK LIKE AN OPCODE PAIR.
AD NEGONE # (YUL CANT REMOVE 1 BECAUSE OF EARLY CCS)
DOSTORE TS ADDRWD
DOSTORE TS ADDRWD
MASK LOW11 # ENTRY FROM DISPATCHER. SAVE THE ERASABLE
XCH ADDRWD # ADDRESS AND JUMP ON THE STORE CODE NO.
MASK B12T14
@ -411,7 +411,7 @@ DOSTORE TS ADDRWD
MP BIT5 # EACH TRANSFER VECTOR ENTRY IS TWO WORDS.
ITR0 INDEX A
TCF STORJUMP
# Page 1120
# STORE CODE JUMP TABLE. CALLS THE APPROPRIATE STORING ROUTINE AND EXITS TO DANZIG OR TO ADDRESS WITH
# A SUPPLIED OPERATION CODE.
@ -424,30 +424,30 @@ STORJUMP TC STORE # STORE.
TCF DANZIG
TC STORE,2
TCF DANZIG
TC STORE # STODL.
TCF DODLOAD
TC STORE # STODL WITH INDEXED LOAD ADDRESS.
TCF DODLOAD*
TC STORE # STOVL.
TCF DOVLOAD
TC STORE # STOVL WITH INDEXED LOAD ADDRESS.
TCF DOVLOAD*
TC STORE # STOTC.
CAF CALLCODE
TS CYR
TCF 15BITADR # GET A 15 BIT ADDRESS.
# Page 1121
# STORE CODE ADDRESS PROCESSOR.
STORE,1 INDEX FIXLOC
CS X1
TCF PRESTORE
STORE,2 INDEX FIXLOC
CS X2
PRESTORE ADS ADDRWD # RESULTANT ADDRESS IS IN ERASABLE.
@ -471,27 +471,27 @@ STARTSTO EXTEND # MPAC,+1 MUST BE STORED IN ANY EVENT.
DCA MPAC
INDEX ADDRWD
DXCH 0
CCS MODE
TCF TSTORE
TC Q
VSTORE EXTEND
DCA MPAC +3
INDEX ADDRWD
DXCH 2
EXTEND
DCA MPAC +5
INDEX ADDRWD
DXCH 4
TC Q
TSTORE CA MPAC +2
INDEX ADDRWD
TS 2
TC Q
# Page 1123
# ROUTINES TO BEGIN PROCESSING OF THE SECOND ADDRESS ASSOCIATED WITH ALL STORE-TYPE CODES EXCEPT STORE
# ITSELF.
@ -519,7 +519,7 @@ TLOAD INDEX ADDRWD
DXCH MPAC
TMODE CAF ONE
TCF NEWMODE # DECLARE TRIPLE PRECISION MODE.
SLOAD ZL # LOAD A SINGLE PRECISION NUMBER INTO
INDEX ADDRWD # MPAC, SETTING MPAC+1,2 TO ZERO. THE
CA 0 # CONTENTS OF THE REMAINING MPAC REGISTERS
@ -529,12 +529,12 @@ VLOAD EXTEND # LOAD A DOUBLE PRECISION VECTOR INTO
INDEX ADDRWD # MPAC,+1, MPAC+3,4, AND MPAC+5,6. THE
DCA 0 # CONTENTS OF MPAC +2 ARE IRRELEVANT.
DXCH MPAC
ENDVLOAD EXTEND # PDVL COMES HERE TO FINISH UP FOR DP, TP.
INDEX ADDRWD
DCA 2
DXCH MPAC +3
+4 EXTEND # TPDVL FINISHES HERE.
INDEX ADDRWD
DCA 4
@ -594,7 +594,7 @@ PDVL EXTEND # RELOAD MPAC AND PUSH DOWN ITS CONTENTS.
DXCH MPAC
INDEX PUSHLOC
DXCH 0
INDEX MODE # ADVANCE THE PUSHDOWN POINTER.
CAF NO.WDS
ADS PUSHLOC
@ -609,26 +609,26 @@ VPDVL EXTEND # PUSHDOWN AND RE-LOAD LAST TWO COMPONENTS
DXCH MPAC +3
INDEX PUSHLOC
DXCH 0 -4
EXTEND
INDEX ADDRWD
DCA 4
DXCH MPAC +5
INDEX PUSHLOC
DXCH 0 -2
TCF DANZIG
TPDVL EXTEND # ON TP, WE MUST LOAD THE Y COMPONENT
INDEX ADDRWD # BEFORE STORING MPAC +2 IN CASE THIS IS A
DCA 2 # PUSHUP.
DXCH MPAC +3
CA MPAC +2
INDEX PUSHLOC # IN DP.
TS 0 -1
TCF ENDVLOAD +4
# SSP (STORE SINGLE PRECISION) IS EXECUTED HERE.
SSP INCR LOC # PICK UP THE WORD FOLLOWING THE GIVEN
@ -638,7 +638,7 @@ STORE1 INDEX ADDRWD # SOME INDEX AND MISCELLANEOUS OPS END
TS 0 # HERE.
# Page 1127
TCF DANZIG
# Page 1128
# SEQUENCE CHANGING AND SUBROUTINE CALLING OPTIONS.
#
@ -669,7 +669,7 @@ CALL CA BANKSET # FOR ANY OF THE CALL OPTIONS, MAKE UP THE
AD LOC # BANKMASK = -(2000 - 1).
INDEX FIXLOC
TS QPRET
GOTO CA POLISH # BASIC BRANCHING SEQUENCE.
+1 MASK HIGH4
EXTEND
@ -682,9 +682,9 @@ GOTO CA POLISH # BASIC BRANCHING SEQUENCE.
AD 2K
TS LOC
TCF INTPRET +3
EBANK= 1400 # SO YUL DOESN'T CUSS THE "CA 1400" BELOW.
GOTOERS CA POLISH # THE GIVEN ADDRESS IS IN ERASABLE -- SEE
AD -ENDVAC # IF RELATIVE TO THE WORK ARA.
CCS A
@ -698,14 +698,14 @@ GOTOERS CA POLISH # THE GIVEN ADDRESS IS IN ERASABLE -- SEE
CA 0 # THE BRANCH ADDRESS.
TS POLISH
TCF GOTO +1 # ALLOWS ARBITRARY INDIRECTNESS LEVELS.
GOTOGE TS EBANK
MASK LOW8
INDEX A # USE THE GIVEN ADDRESS AS THE ADDRESS OF
CA 1400 # THE BRANCH ADDRESS.
TS POLISH
TCF GOTO +1
CGOTO INDEX LOC # COMPUTED GO TO. PICK UP ADDRESS OF CADR
CA 1 # LIST
INDEX ADDRWD # ADD MODIFIER.
@ -716,14 +716,14 @@ CGOTO INDEX LOC # COMPUTED GO TO. PICK UP ADDRESS OF CADR
CA 10000
TS POLISH
TCF GOTO +1 # WITH ADDRESS IN A.
SWBRANCH CA BANKSET # SWITCH INSTRUCTIONS WHICH ELECT TO
TS FBANK # BRANCH COME HERE TO DO SO.
INDEX LOC
CA 1
TS POLISH
TCF GOTO +1
# Page 1130
# TRIPLE PRECISION BRANCHING ROUTINE. IF CALLING TC IS AT L, RETURN IS AS FOLLOWS:
# L+1 IF MPAC IS GREATER THAN ZERO.
@ -734,23 +734,23 @@ BRANCH CCS MPAC
TC Q
TCF +2 # ON ZERO.
TCF NEG
CCS MPAC +1
TC Q
TCF +2
TCF NEG
CCS MPAC +2
TC Q
TCF +2
TCF NEG
Q+1 INDEX Q
TC 1
NEG INDEX Q # IF FIRST NON-ZERO REGISTER WAS NEGATIVE.
TC 2
Q+2 = NEG
# ITRACE (3) REFERS TO "EXIT".
@ -776,7 +776,7 @@ EXIT CA BANKSET # RESTORE USER'S BANK SETTING, AND LEAVE
VSU CAF BIT15 # CHANGES 0 TO DCS.
TCF +2
VAD CAF PRIO30 # CHANGES 0 TO DCA.
ADS ADDRWD
EXTEND
@ -786,7 +786,7 @@ VAD CAF PRIO30 # CHANGES 0 TO DCA.
EXTEND # CHECK OVERFLOW.
BZF +2
TC OVERFLWY
EXTEND
INDEX ADDRWD
READ CHAN5 # DCA 4 OR DCS 4
@ -794,7 +794,7 @@ VAD CAF PRIO30 # CHANGES 0 TO DCA.
EXTEND
BZF +2
TC OVERFLWZ
EXTEND
INDEX ADDRWD
READ LCHAN # DCA 0 OR DCS 0
@ -806,11 +806,11 @@ DAD EXTEND
ENDVXV DAS MPAC # VXV FINISHES HERE.
EXTEND
BZF DANZIG
# Page 1132
SETOVF TC OVERFLOW
TCF DANZIG
# Page 1133
DSU EXTEND
INDEX ADDRWD
@ -820,11 +820,11 @@ DSU EXTEND
OVERFLWZ TS L # ENTRY FOR THIRD COMPONENT.
CAF FIVE
TCF +3
OVERFLWY TS L # ENTRY FOR SECOND COMPONENT.
CAF THREE
XCH L
OVERFLOW INDEX A # ENTRY FOR 1ST COMP OR DP (L=0).
CS LIMITS # PICK UP POSMAX OR NEGMAX.
TS BUF
@ -840,18 +840,18 @@ OVERFLOW INDEX A # ENTRY FOR 1ST COMP OR DP (L=0).
TS 7
TC Q # NO OVERFLOW EXIT.
TCF SETOVF2 # SET OVFIND AND EXIT.
BVSU EXTEND
INDEX ADDRWD
DCA 2
DXCH MPAC +3
EXTEND
DCOM
DCOM
DAS MPAC +3
EXTEND
BZF +2
TC OVERFLWY
EXTEND
INDEX ADDRWD
DCA 4
@ -862,7 +862,7 @@ BVSU EXTEND
EXTEND
BZF +2
TC OVERFLWZ
# Page 1134
BDSU EXTEND
INDEX ADDRWD
@ -871,7 +871,7 @@ BDSU EXTEND
EXTEND
DCOM
TCF ENDVXV
# Page 1135
# TRIPLE PRECISION ADD ROUTINE.
@ -884,9 +884,9 @@ TAD EXTEND
AD MPAC
TS MPAC
TCF DANZIG
TCF SETOVF # SET OVFIND IF SUCH OCCURS.
# Page 1136
# ARITHMETIC SUBROUTINES REQUIRED IN FIXED-FIXED.
# 1. DMPSUB DOUBLE PRECISION MULTIPLY, MULTIPLY THE CONTENTS OF MPAC,+1 BY THE DP WORD WHOSE ADDRESS
@ -916,11 +916,11 @@ DMPSUB INDEX ADDRWD # GET MINOR PART OF OPERAND AT C(ADDRWD).
EXTEND # FORM MAJOR OF MPAC X MINOR OF C(ADDRWD).
MP MPAC
DAS MPAC +1 # GUARANTEED NO OVERFLOW.
INDEX ADDRWD # GET MAJOR PART OF ARGUMENT AT C(ADDRWD).
CA 0
XCH MPTEMP # SAVE AND BRING OUT MINOR OF MPAC.
DMPSUB2 EXTEND
DMPSUB2 EXTEND
MP MPTEMP # MAJOR OF C(ADDRWD) X MINOR OF MPAC.
DAS MPAC +1 # ACCUMULATE, SETTING A TO NET OVERFLOW.
@ -929,7 +929,7 @@ DMPSUB2 EXTEND
MP MPTEMP # MAJOR OF MPAC X MAJOR OF C(ADDRWD).
DAS MPAC # GUARANTEED NO OVERFLOW.
TC Q # 49 MCT = .573 MS. INCLUDING RETURN.
# Page 1137
# ROUND MPAC TO DOUBLE PRECISION, SETTING OVFIND ON THE RARE EVENT OF OVERFLOW.
@ -979,7 +979,7 @@ DOTSUB EXTEND
TS BUF
TCF +2
TS OVFIND # IF OVERFLOW OCCURS.
DXCH MPAC +5 # MULTIPLY Z COMPONENTS.
DXCH MPAC
CA DOTINC
@ -1037,30 +1037,30 @@ POLY INDEX Q
POLYCOM CAF LVBUF # INCOMING X WILL BE MOVED TO VBUF, SO
TS ADDRWD # SET ADDRWD SO DMPSUB WILL MPY BY VBUF.
EXTEND
INDEX POLISH
DCA 3
# Page 1140
DXCH MPAC # LOAD A(N) INTO MPAC
DXCH VBUF # SAVING X IN VBUF
TCF POLY2
POLYLOOP TS POLYCNT # SAVE DECREMENTED LOOP COUNTER
CS TWO
ADS POLISH # REGRESS COEFFICIENT POINTER
POLY2 TC DMPSUB # MULTIPLY BY X
EXTEND
INDEX POLISH
DCA 1 # ADD IN NEXT COEFFICIENT
DAS MPAC # USER'S RESPONSIBILITY TO ASSURE NO OVFLOW
CCS POLYCNT
TCF POLYLOOP
TC POLYRET # RETURN CALLER
# Page 1141
# MISCELLANEOUS MULTI-PRECISION ROUTINES REQUIRED IN FIXED-FIXED BUT NOT USED BY THE INTERPRETER.
@ -1477,7 +1477,7 @@ DCOMP CS MPAC +2
BANK 00
COUNT 00/INTER
SHORTT CAF SIX # SCALAR SHORT SHIFTS COME HERE. THE SHIFT
MASK CYR # COUNT-1 IS NOW IN BITS 2-3 OF CYR. THE
TS SR # ROUNDING BIT IS IN BIT1 AT THIS POINT.
@ -2816,7 +2816,7 @@ TCSUBTR TCF SUBTR
BANK 01
COUNT 01/INTER
AXT TC TAGSUB # SELECT APPROPRIATE INDEX REGISTER.
CA POLISH
XSTORE INDEX INDEXLOC # CONTAINS C(FIXLOC) OR C(FIXLOC)+1
@ -3056,4 +3056,4 @@ SWSKIP INCR LOC
SW/ EQUALS SWITCHES
+13D TCF DANZIG # 11 -- NOOP.